Dynamically Reconfigurable Systems
Architectures, Design Methods and Applications
(Sprache: Englisch)
This book details the newest developments and trends in dynamic and run-time reconfigurable systems. It covers all aspects of the subject: architectures, design methods and applications.
Leider schon ausverkauft
versandkostenfrei
Buch
129.98 €
Produktdetails
Produktinformationen zu „Dynamically Reconfigurable Systems “
This book details the newest developments and trends in dynamic and run-time reconfigurable systems. It covers all aspects of the subject: architectures, design methods and applications.
Klappentext zu „Dynamically Reconfigurable Systems “
Dynamically Reconfigurable Systems is the first ever to focus on the emerging field of Dynamically Reconfigurable Computing Systems. While programmable logic and design-time configurability are well elaborated and covered by various texts, this book presents a unique overview over the state of the art and recent results for dynamic and run-time reconfigurable computing systems.
Reconfigurable hardware is not only of utmost importance for large manufacturers and vendors of microelectronic devices and systems, but also a very attractive technology for smaller and medium-sized companies. Hence, Dynamically Reconfigurable Systems also addresses researchers and engineers actively working in the field and provides them with information on the newest developments and trends in dynamic and run-time reconfigurable systems.
Inhaltsverzeichnis zu „Dynamically Reconfigurable Systems “
Part I Architectures1 Development and synthesis of adaptive multi-grained reconfigurable hardware architecture for dynamic function patterns; A.Thomas, J.Becker
1.1 Introduction
1.2 HoneyComb architecture
1.3 Tool Support
1.4 Future Work
1.5 Conclusion. References
2 Reconfigurable components for application-specific processor architectures; T.G. Noll, T.von Sydow, B.Neumann, J.Schleifer, T.Coenen, G.Kappen
2.1 Introduction
2.2 Parameterized eFPGA Target Architecture
2.3 Physical Implementation of Application Class Specific eFPGAs
2.4 Mapping and Configuration
2.5 Examples of (Stand Alone) eFPGAs as SoC Building Blocks
2.6 Examples of eFPGAs as Coprocessors to Standard RISC Processor Kernels
2.7 Conclusion. References
3 Erlangen Slot Machine: An FPGA-Based Dynamically Reconfigurable Computing Platform; J.Angermeier, C.Bobda, M.Majer, J.Teich
3.1 Introduction
3.2 Drawbacks of existing dynamically reconfigurable systems
3.3 The Erlangen Slot Machine
3.4 Inter-module Communications
3.5 Reconfiguration Manager
3.6 Case Study: Video and audio streaming
3.7 Usage of the ESM in different fields
3.8 Conclusions. References
Part II Design Methods and Tools - Modeling, Evaluation and Compilation
4 Models and Algorithms for Hyperreconfigurable Hardware; S.Lange, M.Middendorf
4.1 Introduction
4.2 Hyperreconfigurable Machines
4.3 Example Architectures and Test Cases
4.4 The Partition into Hypercontexts Problem
4.5 Diverse Granularity in Multi-level Reconfigurable Systems
4.6 Partial Reconfiguration and Hyperreconfiguration
4.7 Conclusions. References
5 Evaluation and Design Methods for Processor-Like Reconfigurable Architectures; S.Eisenhardt, T.Schweizer, J.Oliveira Filho, T.Kuhn, W.Rosenstiel
5.1 Introduction
5.2 Benefits and Costs of Processor-LikeReconfiguration
5.3 Specialization / Instruction Set Extension
5.4 Optimizing Power
5.5 Optimizing External Reconfiguration
5.6 Conclusion. References
6 Adaptive Computing Systems and their
... mehr
Design Tools; A.Koch
6.1 Introduction
6.2 Execution Model
6.3 ACS Architecture
6.4 Hardware/Software Co-Compilation Flow
6.5 Infrastructure
6.6 Lessons Learned
6.7 Future Work
6.8 Conclusions. References
7 POLYDYN- Object-oriented modelling and synthesis targeting dynamically reconfigurable FPGAs; A.Schallenberg, W.Nebel, A.Herrholz, P.A. Hartmann, K.Grüttner, F.Oppenheimer
7.1 Introduction
7.2 Related work
7.3 Methodology
7.4 Derived interface classes
7.5 Modelling example: Car audio system
7.6 Synthesising OSSS+R
7.7 Evaluation
7.8 Conclusion and Future Work. References
Part III Design Methods and Tools - Optimization and Runtime Systems
8 Design Methods and Tools for Improved Partial Dynamic Reconfiguration; M.Rullmann, R.Merker
8.1 Introduction
8.2 Motivation
8.3 Reconfigurable Module Architecture and Partitioning
8.4 Reconfiguration State Graph
8.5 Module Mapping and Virtual Architecture
8.6 High-Level Synthesis of Reconfigurable Modules
8.7 Experiments
8.8 System Design for Efficient Partial Dynamic Reconfiguration
- References
9 Dynamic Partial Reconfiguration by Means of Algorithmic Skeletons - A Case Study -; N.Montealegre, F.J. Rammig
9.1 Introduction
9.2 Overview of the overall system
9.3 Library of Algorithmic Skeletons
9.4 Application Scenario: Channel Vocoder Analyzer
9.5 Conclusion. References
10 ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices; A.Ahmadinia, J.Angermeier, S.P. Fekete, T.Kamphans, D.Koch, M.Majer, N.Schweer, J.Teich, C.Tessars, J.C. van der Veen
10.1 Introduction
6.1 Introduction
6.2 Execution Model
6.3 ACS Architecture
6.4 Hardware/Software Co-Compilation Flow
6.5 Infrastructure
6.6 Lessons Learned
6.7 Future Work
6.8 Conclusions. References
7 POLYDYN- Object-oriented modelling and synthesis targeting dynamically reconfigurable FPGAs; A.Schallenberg, W.Nebel, A.Herrholz, P.A. Hartmann, K.Grüttner, F.Oppenheimer
7.1 Introduction
7.2 Related work
7.3 Methodology
7.4 Derived interface classes
7.5 Modelling example: Car audio system
7.6 Synthesising OSSS+R
7.7 Evaluation
7.8 Conclusion and Future Work. References
Part III Design Methods and Tools - Optimization and Runtime Systems
8 Design Methods and Tools for Improved Partial Dynamic Reconfiguration; M.Rullmann, R.Merker
8.1 Introduction
8.2 Motivation
8.3 Reconfigurable Module Architecture and Partitioning
8.4 Reconfiguration State Graph
8.5 Module Mapping and Virtual Architecture
8.6 High-Level Synthesis of Reconfigurable Modules
8.7 Experiments
8.8 System Design for Efficient Partial Dynamic Reconfiguration
- References
9 Dynamic Partial Reconfiguration by Means of Algorithmic Skeletons - A Case Study -; N.Montealegre, F.J. Rammig
9.1 Introduction
9.2 Overview of the overall system
9.3 Library of Algorithmic Skeletons
9.4 Application Scenario: Channel Vocoder Analyzer
9.5 Conclusion. References
10 ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices; A.Ahmadinia, J.Angermeier, S.P. Fekete, T.Kamphans, D.Koch, M.Majer, N.Schweer, J.Teich, C.Tessars, J.C. van der Veen
10.1 Introduction
... weniger
Bibliographische Angaben
- 2014, 2010., 441 Seiten, Maße: 23,5 cm, Kartoniert (TB), Englisch
- Herausgegeben:Platzner, Marco; Wehn, Norbert
- Verlag: Springer Netherlands
- ISBN-10: 9400790767
- ISBN-13: 9789400790766
Sprache:
Englisch
Kommentar zu "Dynamically Reconfigurable Systems"
0 Gebrauchte Artikel zu „Dynamically Reconfigurable Systems“
Zustand | Preis | Porto | Zahlung | Verkäufer | Rating |
---|
Schreiben Sie einen Kommentar zu "Dynamically Reconfigurable Systems".
Kommentar verfassen