Introduction to VLSI Silicon Devices

1. Resistances and Their Measurements.- 1.0 Introduction.- 1.1 Resistance.- 1.2 Resistivity.- 1.3 Current Density.- 1.4 Electric Field, Mobility, Conductivity and Resistivity.- 1.5 Carrier Concentrations.- 1.6 Sheet Resistance and Techniques for its Evaluation.- 1.7 Line Width and Mask Alignments.- 1.8 The Spreading Resistance Technique.- Summary of Important Equations.- References.- 2. PN Junctions.- 2.0 Introduction.- 2.1 Description of PN Junction.- 2.2 Fabrication of A PN Junction.- 2.3 Characteristics of the PN Junction at Thermal Equilibrium.- 2.4 Forward Biased PN Junction.- 2.5 Reverse Biased PN Junction.- Summary of Important Equations.- References.- 3. The Bipolar Transistor.- 3.0 Introduction.- 3.1 Transistor Action.- 3.2 A Typical Bipolar Process Sequence.- 3.3 Injection Parameters, Wide Base Region.- 3.4 Injection Parameters, Narrow Base Region.- 3.5 The Schottky Barrier Diode.- 3.6 Maximum Transistor Voltage Limitations.- 3.7 High-Current Transistor Characteristics.- 3.8 High-Frequency and Switching Behavior.- Summary of Important Equations.- References.- 4. The MIS CV Technique.- 4.0 Introduction.- 4.1 The Insulator Capacitance.- 4.2 The Ideal MOS System.- 4.3 Description and Analysis of an Ideal Cv-Curve.- 4.4 The Real MIS Structure.- 4.5 Methods to Evaluate CV-Plots.- Summary of Important Equations.- References.- 5. Surface Effects on PN Junctions.- 5.0 Introduction.- 5.1 Ideal Structure without Applied Bias.- 5.2 Ideal Structure with Applied Bias on the Gate.- 5.3 Effect of Insulator Charge and Work-Function Difference.- 5.4 Body-Effect or Substrate Bias Sensitivity.- 5.5 Reverse Current.- 5.6 Effect of Gate Bias on the Junction Breakdown Voltage.- 5.7 Injection of Hot Carriers into the Insulator.- 5.8 Surface Effects on the Junction Forward Characteristics.- Summary of Important Equations.- References.- 6. Insulated-Gate-Field-Effect-Transistor (IGFET).- 6.0 Introduction.- 6.1 Principle of Operation.- 6.2 Fabrication Techniques.- 6.3