The Fourth Terminal / Integrated Circuits and Systems (PDF)

Sylvain CLERC (M'99) received the Engineering Degree in Digital System Architecture from Grenoble National Polytechnical Institute in 1993. From 1995 to 1999 he was with Dolphin Integration, now Dolphin Design, Meylan, France, working on memory generator design and automated layout. In 1999, he joined STMicroelectronics, Crolles, France, in Technology Design Platform group. He was responsible for standard cell design and Silicon qualification. From 2006 to 2016 he was in a team in charge of radiation hardening and silicon IPs qualification for space and terrestrial environments. He is now working in Digital Design Flow Methodology team. His current research domain is Safety and Energy Efficient circuit design.

Thierry DI GILIO was born in 1978 in Marseille, France. He received his his M.Sc in Physic and Modelling Of complex Systems from University of Provence, France in 2002. In 2006, he obtained his PhD degree in nano-electronic from University of Provence. During 3 years, heworked at Sofradir (Veurey-Voroise, France) as a consultant, and designed several Readout Circuits for cooled infrared detector applications. In 2011 he joined STMicroelectronics Central R&D (in Crolles, France) to design embedded power management circuits for digital and RF SoCs including the development of embedded boby biasing solutions for FDSOI technologies. He is now in charge of Power Management IP design within Imaging Product group.


Andreia Cathelin (M'04, SM'11) is a Technology R&D Fellow at STMicroelectronics, Crolles France. She started electrical engineering studies at the Polytechnic Institute of Bucarest, Romania and graduated with MS from the Institut Supérieur d'Electronique du Nord (ISEN), Lille, France in 1994. In 1998 and 2013 respectively, she received PhD and "habilitation à diriger des recherches" (French highest academic degree) from the Université de Lille 1, France.


Since 1998, she has been with STMicroelectronics, Crolles, France. Her