Closing the Power Gap Between Asic & Custom

Until recently, ASIC designers have mostly focused on how to achieve the desired performance requirements, and the typical ASIC design flow pays limited attention to power. In comparison, some custom designs have significantly advanced techniques for low power, such as voltage islands, substrate biasing, and sleep mode power gating.

It is widely acknowledged that custom designed chips can achieve low poer at the same performance compared to ASIC chips designed in an EDA flow. However, the significance of different low power design approaches has not yet been explored in detail. In Closing the POWER Gap between ASIC & Custom, the significance of different low power design approaches is explored in detail. This book will cover how to use low power design approaches in an automated design flow, and examine the design time and performance trade-offs of low power design.

The introductory chapters outline factors affecting the power consumption of ASIC and custom designs, then explore how each factor can contribute to custom designs being lower power than ASICs. Also detailed are custom techniques that can be applied in an ASIC design methodology, and what other alternatives there are for ASIC designs to bridge the power gap. The second section of the book focuses on the latest tools and techniques for low power design that may be applied in an ASIC design flow. A final section provides low power design examples and where some of these techniques have been applied.