Transactions on High-Performance Embedded Architectures 1

- High Performance Processor Chips

- High Performance Processor Chips

- High-Performance Embedded Architecture and Compilation Roadmap

1. First International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC 2005. Best Papers

- to Part 1

- Quick and Practical Run-Time Evaluation of Multiple Program Optimizations

- Specializing Cache Structures for High Performance and Energy Conservation in Embedded Systems

- GCH: Hints for Triggering Garbage Collections

- Memory-Centric Security Architecture

- Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems

2. Optimizing Compilers

- to Part 2

- Convergent Compilation Applied to Loop Unrolling

- Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations

- Dynamic and On-Line Design Space Exploration for Reconfigurable Architectures

- Automatic Discovery of Coarse-Grained Parallelism in Media Applications

- An Approach for Enhancing Inter-processor Data Locality on Chip Multiprocessors

3. ACM International Conference on Computing Frontiers 2006. Best Papers

- to Part 3

- Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology

- Using Application Bisection Bandwidth to Guide Tile Size Selection for the Synchroscalar Tile-Based Architecture

- Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors

- Selective Code Compression Scheme for Embedded Systems

- A Prefetching Algorithm for Multi-speed Disks

- Reconfiguration Strategies for Environmentally Powered Devices: Theoretical Analysis and Experimental Validation