VLSI Synthesis of DSP Kernels
Algorithmic and Architectural Transformations
(Sprache: Englisch)
A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. The book...
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Klappentext zu „VLSI Synthesis of DSP Kernels “
A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. The book covers the entire solution space comprising both hardware multiplier-based and multiplex-less architectures that offer varying degrees of programmability. For each of the implementation styles, several algorithmic and architectural transformations are proposed so as to optimally implement weighted-sum based DSP kernels over the area-display-power space. VLSI Synthesis of DSP Kernels presents the following:
- Programmable DSP-based implementation;
- Programmable processors with no dedicated hardware multiplier;
- Implementation using hardware multiplier(s) and adder(s);
- Distributed Arithmetic (DA)-based implementation;
- Residue Number System (RNS)-based implementation; and
- Multiplier-less implementation (using adders and shifters) for fixed coefficient DSP kernels.
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managers interested in getting a comprehensive overview of current trends and future challenges in optimal implementations of DSP kernels. It will also be suitable for graduate students specialising in the area of VLSI Digital Signal Processing.
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Inhaltsverzeichnis zu „VLSI Synthesis of DSP Kernels “
- List of Figures- List of Tables
- Foreword
- Acknowledgments
- Preface
1. Introduction
2. Programmable DSP Based Implementation
3. Implementation Using Hardware Multiplier(s) and Adder(s). 4. Distributed Arithmetic Based Implementation
5. Multiplier-Less Implementation
6. Implementation of Multiplication-Free Linear Transforms
7. Residue Number System Based Implementation
8. A Framework for Algorithmic and Architectural Transformations
9. Summary
- References
- Topic Index
- About the Authors
- Index
Bibliographische Angaben
- Autoren: Mahesh Mehendale , Sunil D. Sherlekar
- 2010, XXIV, 210 Seiten, Maße: 23,1 x 24 cm, Kartoniert (TB), Englisch
- Verlag: Springer, Berlin
- ISBN-10: 1441949046
- ISBN-13: 9781441949042
Sprache:
Englisch
Pressezitat
From the reviews: "This book is devoted to describing the extremely fruitful 'marriage' between digital signal processing (DSP) and integrated circuit technology. ... The present book is a generous and most qualified offer to all developers, either researchers or managers interested in VLSI and DSP, but especially to practicing system designers involved in both hardware and software optimal implementation of DSP kernels." (Neculai Curteanu, Zentralblatt MATH, Vol. 1050, 2005)
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