Deep In-memory Architectures for Machine Learning (PDF)

Mingu Kang received the B.S. and M.S. degrees in Electrical and Electronic Engineering from Yonsei University, Seoul, South Korea, in 2007 and 2009, respectively, and the Ph.D. degree in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign, Champaign, IL, USA, in 2017. From 2009 to 2012, he was with the Memory Division, Samsung Electronics, Hwaseong, South Korea, where he was involved in the circuit and architecture design of phase change memory (PRAM). Since 2017, he has been with the IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA, where he designs machine learning accelerator architectures. His current research interests include low-power integrated circuits, architectures, and systems for machine learning, signal processing, and neuromorphic computing.







Sujan Gonugondla received the B.Tech and M.Tech. degrees in Electrical Engineering from the Indian Institute of Technology Madras, Chennai, India, in 2014. He is currently pursuing the Ph.D. degree in the Department of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign, Champaign, IL, USA. His current research interests include low-power integrated circuits specifically algorithm hardware co-design for machine learning systems on resource constrained environments. Sujan



Gonugondla is a recipient of the Dr. Ok Kyun Kim Fellowship 2018-19 from the ECE department at the University of Illinois at Urbana-Champaign and the ADI Outstanding Student Designer Award 2018.







Naresh R. Shanbhag is the Jack Kilby Professor of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign. He received his Ph.D. degree from the University of Minnesota (1993) in Electrical Engineering. From 1993 to 1995, he worked at AT&T Bell Laboratories at Murray Hill where he led the design of high-speed transceiver chip-sets for very high-speed digital subscriber line