A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel

Introduction.- Transmitter Receiver Techniques.- Modulation Techniques and Signal Processing.- Basic Considerations of PLL and Its Types.- Digital Phased Locked Loop.- Synchronization.- A Zero Crossing Algorithm based Digital Phase Locked Loop.- Least Square Polynomial Fitting based Digital Phase Locked Loop.- A DPLL based Recovery System for Nakagami-m Fading Channel.- Coding Assisted Carrier and Symbol Recovery using DPLL.- Carrier Phase Detection of Rayleigh and Rician Faded Signals using Digital Phase Locked Loop.- DPLL based Square Loop for Carrier Synchronization over Fading Channel.- Conclusions and Future Direction.

Mr. Basab Bijoy Purkayastha is currently working as Technical Superintendent in the Department of Physics, Indian Institute of Technology Guwahati, India. He has completed MSc in Electronics Science from Gauhati University, India in 2002. He also completed M.Tech from the same institution in 2012 with specialization in Mobile Communication and DPLL based Design. He has around 10 research papers published in international conference proceedings and journals.



Dr. Kandarpa Kumar Sarma, currently Associate Professor in Department of Electronics and Communication Technology, Gauhati University, Guwahati, Assam, India, has over seventeen years of professional experience. He has covered all areas of UG/PG level electronics courses including soft computing, mobile communication, digital signal and image processing. He obtained MTech degree in Signal Processing from Indian Institute of Technology Guwahati in 2005 and subsequently completed PhD programme in the area of Soft-Computational Application in Mobile Communication. He has authored seven books, several book chapters, around three hundred peer reviewed research papers in international conference proceedings and journals. His areas of interest are Soft-Computation and its Applications, Mobile Communication, Antenna Design, Speech Processing, Document Image Analysis and Signal Processing Applications in High Energy Physics, Neuro-computing and Computational Models for Social-Science Applications. He is senior member IEEE (USA), Fellow IETE (India), Member International Neural Network Society (INNS, USA), Life Member ISTE (India) and Life Member CSI (India). He serves as an Editor-in-Chief of International Journal of Intelligent System Design and Computing (IJISDC, UK), guest editor of several international journals, reviewer of over thirty international journals and over hundred international conferences.