Interconnect-Centric Design for Advanced SOC and NOC

Preface
1. IntroductionJari Nurmi, Hannu Tenhunen, Jouni Isoaho, Axel Jantsch
2. System-on-Chip Challenges in the Deep-Submicron EraJan M. Rabaey

PART I: PHYSICAL AND ELECTRICAL ISSUES
3. Wires as InterconnectsLi-Rong Zheng, Hannu Tenhunen
4. Global Interconnect Analysis Towards NoCTero Nurmi, Jian Liu, Dinesh Pamunuwa, Tapani Ahonen, Li-Rong Zheng,Jouni Isoaho, Hannu Tenhunen
5. Design Methodologies for On-Chip Inductive InterconnectMagdy A. El-Moursy, Eby Friedman
6. Clock Generation and Distribution for High-Performance SoC DesignsStefan Rusu

PART II: LOGICAL AND ARCHITECTURAL ISSUES
7. Error-Tolerant Interconnect SchemesHeiko Zimmer, Axel Jantsch
8. Power Reduction Coding for BusesPaul P. Sotiriadis
9. Overview of SoC BusesVesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen
10. From Buses to NetworksDavid Siguenza Tortosa, Jari Nurmi
11. Arbitration and Routing Schemes for On-Chip Packet NetworksHeikki Kariniemi, Jari Nurmi

PART III: DESIGN METHODOLOGY AND TOOLS
12. Methodology and Techniques for Noise Reduction in SoC InterconnectsPasi Liljeberg, Johanna Tuominen, Sampo Tuuna, Juha Plosila, Jouni Isoaho
13. Formal Communication Modeling and RefinementJuha Plosila, Tiberiu Seceleanu, Kaisa Sere
14. High-Level Communication Models for On-Chip Multiprocessor System SimulationJan Madsen, Shankar Mahadevan, Kashif Virk
15. Socket-based Design Using Decoupled InterconnectsDrew Wingard

PART IV: APPLICATION CASES
16. Interconnect and Memory Organization in SOCs for Advanced Set-Top Boxes and TVKees Goossens, Om. Prajash Gangwal, Jens Röver, A.P. Niranjan
17. A Brunch for the Coffee Table - Case Study in NOC Platform DesignTapani Ahonen, Seppo Virtanen, Juha Kylliäinen, Dragos Truscan, Tuukka Kasanko,David Sigüenza Tortosa, Tapio Ristimäki, Jani Paakkulainen, Tero Nurmi,Ilkka Saastamoinen, Hannu Isännäinen, Johan Lilius, Jari Nurmi, Jouni Isoaho

From the reviews:

"...a collection of edited chapters written by various experts on NoC and on-chip communications design; the editors contributed to several of the chapters and, for the others, drew on several colleagues-including those participating in Complain, the Finnish-Swedish Excite research project. The editors have carefully chosen the topics in this volume to reflect the multiple levels and types of design knowledge required to gain an appreciation of the field... this book is quite useful for educating any SoC design team in many of the areas critical to adapting their designs to future generations of interconnect. It can also be a useful reference text for advanced undergraduate- and graduate-level courses in SoC and VLSI design. Designers and design educators should take a close look at this book."
(IEEE Design & Test of Computers Magazine)

"The book is a collection of edited chapters written by various experts on NoC and on chip communications design ... . The editors have carefully chosen the topics in this volume ... . Clearly, the book covers an impressive breadth of topics ... . Each chapter surveys the relevant literature in its particular topic area and provides an extensive reference list ... . a useful reference text for advanced undergraduate- and graduate-level courses in SoC and VLSI design. Design and design educators should take a close look at this book." (Grant Martin, IEEE Design & Test of Computers, March-April, 2005)