PARLE '89 - Parallel Architectures and Languages Europe

The cache coherence protocol of the Data Diffusion Machine.- Universal mechanisms for concurrency.- Serial multiport memory multiprocessors.- Modeling and analysis of multiprocessor systems with priority and multiple resources allocation to the tasks.- Achieving low cost synchronization in a multiprocessor system.- The Synchronous Dataflow MAchine: Architecture and performance.- The lady programming environment for distributed operating systems.- A static scheduling system for a parallel machine (SM)2-II.- Distributed implementation of programmed graph reduction.- Parallel object-oriented descriptions of graph reduction machines.- MaRS, a combinator graph reduction multiprocessor.- High-performance parallel graph reduction.- An efficient distributed garbage collection algorithm.- Mark DURING sweep rather than mark THEN sweep.- Architecture of a communication network processor.- The feasibility of a general-purpose parallel computer using WSI.- A coarse grain parallel architecturefor functional languages.- A Functional Programming environment supporting execution, partial execution and transformation.- The gene concept and its implementation for a dataflow schemed parallel computer.- Hybrid structure: A scheme for handling data structures in a data flow environment.- Implementation conditions for delay insensitive circuits.- POOL and DOOM a survey of esprit 415 subproject A, Philips research laboratories.- Multi-level simulator for VLSI on the parallel object-oriented machine.- Overview of a parallel reduction machine project II.- A parallel database accelerator.- IDEAL & K-LEAF implementation: a progress report.- The sto//mann data flow machine.- Partheo: A parallel inference machine ESPRIT 415 subproject F.