Fundamentals of Computer Organization and Architecture / Wiley Series on Parallel and Distributed Computing Bd.1 (PDF)

Preface. 1. Introduction to Computer Systems. 1.1. Historical Background. 1.2. Architectural Development & Styles. 1.3. Technological Development. 1.4. Performance Measures. 1.5. Summary. Exercises. References and Further Reading. 2. Instruction Set Architecture & Design. 2.1. Memory Locations and Operations. 2.2. Addressing Modes. 2.3. Instruction Types. 2.4. Programming Examples. 2.5. Summary. Exercises. References and Further Reading. 3. Assembly Language Programming. 3.1. A Simple Machine. 3.2. Instructions Mnemonics and Syntax. 3.3. Assembler Directives and Commands. 3.4. Assembly and Execution of Programs. 3.5. Example: The X 86 Family. 3.6. Summary. Exercises. References and Further Reading. 4. Computer Arithmetic. 4.1. Number Systems. 4.2. Integer Arithmetic. 4.3. Floating Point Arithmetic. 4.4. Summary. Exercises. References and Further Readings. 5. Processing Unit Design. 5.1. CPU Basics. 5.2. Register Set. 5.3. Data Path. 5.4. The CPU Instruction Cycle. 5.5. Control Unit. 5.6. Summary. Exercises. References. 6. Memory System Design I. 6.1. Basic Concepts. 6.2. Cache Memory. 6.3. Summary. Exercises. References and Further Readings. 7. Memory System Design II. 7.1. Main Memory. 7.2. Virtual Memory. 7.3. Read-Only Memory. 7.4. Summary. Exercises. References and Further Readings. 8. Input-Output Design and Organization. 8.1. Basic Concepts. 8.2. Programmed I/O. 8.3. Interrupt-Driven I/O. 8.4. Direct Memory Access (DMA). 8.5. Busses. 8.6. Input-Output Interfaces. 8.7. Summary. Exercises. References and Further Readings. 9. Pipelining Design Techniques. 9.1. General Concepts. 9.2. Instruction Pipeline. 9.3. Arithmetic pipeline. 9.4. Summary. Exercises. References and Further Reading. 10. Reduced Instruction Set Computers (RISCs). 10.1. RISC/CISC Evolution Cycle. 10.2. RISCs Design Principles. 10.3. Overlapped Register Windows. 10.4. RISCs Versus CISCs. 10.5. Pioneer (University) RISC Machines. 10.6. Example of Advanced RISC Machines. 10.7. Summary. Exercises.

MOSTAFA ABD-EL-BARR, PhD, is currently a professor and chairman of
the Department of Information Science at Kuwait University. He has
co-authored two other books, published more than 120 papers, and
served as chair for a number of international conferences and
symposia.

HESHAM EL-REWINI, PhD, PE, is a full professor and chairman of
the Department of Computer Sciences and Engineering at Southern
Methodist University (SMU). He has co-authored several books,
published numerous research papers in journals and conference
proceedings, and chaired many international conferences.

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