MOS Devices for Low-Voltage and Low-Energy Applications
(Sprache: Englisch)
Helps readers understand the physics behind MOS devices for low-voltage and low-energy applications
* Based on timely published and unpublished work written by expert authors
* Discusses various promising MOS devices applicable to low-energy environmental...
* Based on timely published and unpublished work written by expert authors
* Discusses various promising MOS devices applicable to low-energy environmental...
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Produktinformationen zu „MOS Devices for Low-Voltage and Low-Energy Applications “
Klappentext zu „MOS Devices for Low-Voltage and Low-Energy Applications “
Helps readers understand the physics behind MOS devices for low-voltage and low-energy applications* Based on timely published and unpublished work written by expert authors
* Discusses various promising MOS devices applicable to low-energy environmental and biomedical uses
* Describes the physical effects (quantum, tunneling) of MOS devices
* Demonstrates the performance of devices, helping readers to choose right devices applicable to an industrial or consumer environment
* Addresses some Ge-based devices and other compound-material-based devices for high-frequency applications and future development of high performance devices.
"Seemingly innocuous everyday devices such as smartphones, tablets and services such as on-line gaming or internet keyword searches consume vast amounts of energy. Even when in standby mode, all these devices consume energy. The upcoming 'Internet of Things' (IoT) is expected to deploy 60 billion electronic devices spread out in our homes, cars and cities.
Britain is already consuming up to 16 per cent of all its power through internet use and this rate is doubling every four years. According to The UK's Daily Mail May (2015), if usage rates continue, all of Britain's power supply could be consumed by internet use in just 20 years. In 2013, U.S. data centers consumed an estimated 91 billion kilowatt-hours of electricity, corresponding to the power generated by seventeen 1000-megawatt nuclear power plants. Data center electricity consumption is projected to increase to roughly 140 billion kilowatt-hours annually by 2020, the equivalent annual output of 50 nuclear power plants."
--Natural Resources Defense Council, USA, Feb. 2015
All these examples stress the urgent need for developing electronic devices that consume as little energy as possible. The book "MOS Devices for Low-Voltage and Low-Energy Applications" explores the different transistor options that can be utilized to achieve that goal. It describes
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in detail the physics and performance of transistors that can be operated at low voltage and consume little power, such as subthreshold operation in bulk transistors, fully depleted SOI devices, tunnel FETs, multigate and gate-all-around MOSFETs. Examples of low-energy circuits making use of these devices are given as well.
"The book MOS Devices for Low-Voltage and Low-Energy Applications is a good reference for graduate students, researchers, semiconductor and electrical engineers who will design the electronic systems of tomorrow."
--Dr. Jean-Pierre Colinge, Taiwan Semiconductor Manufacturing Company (TSMC)
"The authors present a creative way to show how different MOS devices can be used for low-voltage and low-power applications. They start with Bulk MOSFET, following with SOI MOSFET, FinFET, gate-all-around MOSFET, Tunnel-FET and others. It is presented the physics behind the devices, models, simulations, experimental results and applications. This book is interesting for researchers, graduate and undergraduate students. The low-energy field is an important topic for integrated circuits in the future and none can stay out of this."
--Prof. Joao A. Martino, University of Sao Paulo, Brazil
"The book MOS Devices for Low-Voltage and Low-Energy Applications is a good reference for graduate students, researchers, semiconductor and electrical engineers who will design the electronic systems of tomorrow."
--Dr. Jean-Pierre Colinge, Taiwan Semiconductor Manufacturing Company (TSMC)
"The authors present a creative way to show how different MOS devices can be used for low-voltage and low-power applications. They start with Bulk MOSFET, following with SOI MOSFET, FinFET, gate-all-around MOSFET, Tunnel-FET and others. It is presented the physics behind the devices, models, simulations, experimental results and applications. This book is interesting for researchers, graduate and undergraduate students. The low-energy field is an important topic for integrated circuits in the future and none can stay out of this."
--Prof. Joao A. Martino, University of Sao Paulo, Brazil
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Inhaltsverzeichnis zu „MOS Devices for Low-Voltage and Low-Energy Applications “
Preface xvAcknowledgments xvi
Part I INTRODUCTION TO LOW-VOLTAGE AND LOW-ENERGY DEVICES 1
1 Why Are Low-Voltage and Low-Energy Devices Desired? 3
References 4
2 History of Low-Voltage and Low-Power Devices 5
2.1 Scaling Scheme and Low-Voltage Requests 5
2.2 Silicon-on-Insulator Devices and Real History 8
References 10
3 Performance Prospects of Subthreshold Logic Circuits 12
3.1 Introduction 12
3.2 Subthreshold Logic and its Issues 12
3.3 Is Subthreshold Logic the Best Solution? 13
References 13
Part II SUMMARY OF PHYSICS OF MODERN SEMICONDUCTOR DEVICES 15
4 Overview 17
References 18
5 Bulk MOSFET 19
5.1 Theoretical Basis of Bulk MOSFET Operation 19
5.2 Subthreshold Characteristics: "OFF State" 19
5.2.1 Fundamental Theory 19
5.2.2 Influence of BTBT Current 23
5.2.3 Points to Be Remarked 24
5.3 Post-Threshold Characteristics: "ON State" 24
5.3.1 Fundamental Theory 24
5.3.2 Self-Heating Effects 26
5.3.3 Parasitic Bipolar Effects 27
5.4 Comprehensive Summary of Short-Channel Effects 27
References 28
6 SOI MOSFET 29
6.1 Partially Depleted Silicon-on-Insulator Metal Oxide Semiconductor Field-Effect Transistors 29
6.2 Fully Depleted (FD) SOI MOSFET 30
6.2.1 Subthreshold Characteristics 30
6.2.2 Post-Threshold Characteristics 36
6.2.3 Comprehensive Summary of Short-Channel Effects 41
6.3 Accumulation-Mode (AM) SOI MOSFET 41
6.3.1 Aspects of Device Structure 41
6.3.2 Subthreshold Characteristics 42
6.3.3 Drain Current Component (I) - Body Current (ID,body) 43
6.3.4 Drain Current Component (II) - Surface Accumulation
Layer Current (ID,acc) 45
6.3.5 Optional Discussions on the Accumulation Mode SOI MOSFET
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45
6.4 FinFET and Triple-Gate FET 46
6.4.1 Introduction 46
6.4.2 Device Structures and Simulations 46
6.4.3 Results and Discussion 47
6.4.4 Summary 49
6.5 Gate-all-Around MOSFET 50
References 51
7 Tunnel Field-Effect Transistors (TFETs) 53
7.1 Overview 53
7.2 Model of Double-Gate Lateral Tunnel FET and Device Performance Perspective 53
7.2.1 Introduction 53
7.2.2 Device Modeling 54
7.2.3 Numerical Calculation Results and Discussion 61
7.2.4 Summary 65
7.3 Model of Vertical Tunnel FET and Aspects of its Characteristics 65
7.3.1 Introduction 65
7.3.2 Device Structure and Model Concept 65
7.3.3 Comparing Model Results with TCAD Results 69
7.3.4 Consideration of the Impact of Tunnel Dimensionality on Drivability 72
7.3.5 Summary 75
7.4 Appendix Integration of Eqs. (7.14)-(7.16) 76
References 78
Part III POTENTIAL OF CONVENTIONAL BULK MOSFETs 81
8 Performance Evaluation of Analog Circuits with Deep Submicrometer MOSFETs in the Subthreshold Regime of Operation 83
8.1 Introduction 83
8.2 Subthreshold Operation and Device Simulation 84
8.3 Model Description 85
8.4 Results 86
8.5 Summary 90
References 90
9 Impact of Halo Doping on the Subthreshold Performance of Deep-Submicrometer CMOS Devices and Circuits for Ultralow Power Analog/Mixed-Signal Applications 91
9.1 Introduction 91
9.2 Device Structures and Simulation 92
9.3 Subthreshold Operation 93
9.4 Device Optimization fo
6.4 FinFET and Triple-Gate FET 46
6.4.1 Introduction 46
6.4.2 Device Structures and Simulations 46
6.4.3 Results and Discussion 47
6.4.4 Summary 49
6.5 Gate-all-Around MOSFET 50
References 51
7 Tunnel Field-Effect Transistors (TFETs) 53
7.1 Overview 53
7.2 Model of Double-Gate Lateral Tunnel FET and Device Performance Perspective 53
7.2.1 Introduction 53
7.2.2 Device Modeling 54
7.2.3 Numerical Calculation Results and Discussion 61
7.2.4 Summary 65
7.3 Model of Vertical Tunnel FET and Aspects of its Characteristics 65
7.3.1 Introduction 65
7.3.2 Device Structure and Model Concept 65
7.3.3 Comparing Model Results with TCAD Results 69
7.3.4 Consideration of the Impact of Tunnel Dimensionality on Drivability 72
7.3.5 Summary 75
7.4 Appendix Integration of Eqs. (7.14)-(7.16) 76
References 78
Part III POTENTIAL OF CONVENTIONAL BULK MOSFETs 81
8 Performance Evaluation of Analog Circuits with Deep Submicrometer MOSFETs in the Subthreshold Regime of Operation 83
8.1 Introduction 83
8.2 Subthreshold Operation and Device Simulation 84
8.3 Model Description 85
8.4 Results 86
8.5 Summary 90
References 90
9 Impact of Halo Doping on the Subthreshold Performance of Deep-Submicrometer CMOS Devices and Circuits for Ultralow Power Analog/Mixed-Signal Applications 91
9.1 Introduction 91
9.2 Device Structures and Simulation 92
9.3 Subthreshold Operation 93
9.4 Device Optimization fo
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Autoren-Porträt von Yasuhisa Omura, Abhijit Mallik, Naoto Matsuo
Yasuhisa Omura, Professor, Department of Electrical and Electronic Engineering, Kansai University, Osaka, Japan. Professor Omura received his Ph.D. degree in Engineering from Kyushu University, Japan, in 1984. For the past three decades, he has engaged in the research of devices physics analysis and modeling of SOI MOSFET and Lubistor. Professor Omura published more than 300 papers and he is the editor/co-editor of five books. He has been an IEEE Fellow since 2010.Abhijit Mallik, Professor, Department of Electronic Science, University of Calcutta, India
Naoto Matsuo, Associate Professor, Department of Electrical and Electronic Engineering, Yamaguchi University, Japan
Bibliographische Angaben
- Autoren: Yasuhisa Omura , Abhijit Mallik , Naoto Matsuo
- 2017, 1. Auflage, 488 Seiten, Maße: 25,1 cm, Gebunden, Englisch
- Verlag: Wiley & Sons
- ISBN-10: 1119107350
- ISBN-13: 9781119107354
Sprache:
Englisch
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