Beyond-CMOS Technologies for Next Generation Computer Design (PDF)
This book describes the bottleneck faced soon by designers of traditional CMOS devices, due to device scaling, power and energy consumption, and variability limitations. This book aims at bridging the gap between device technology and...
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This book describes the bottleneck faced soon by designers of traditional CMOS devices, due to device scaling, power and energy consumption, and variability limitations. This book aims at bridging the gap between device technology and architecture/system design. Readers will learn about challenges and opportunities presented by "beyond-CMOS devices" and gain insight into how these might be leveraged to build energy-efficient electronic systems.
- Provides an overview of CMOS scaling challenges and motivation for considering "beyond-CMOS devices;"
- Discusses challenges posed by beyond-CMOS integration;
- Sheds light on how device architecture and systems should be designed differently leveraging beyond-CMOS device technologies.
H.-S. Philip Wong is the Willard R. and Inez Kerr Bell Professor in the School of Engineering. He joined Stanford University as Professor of Electrical Engineering in September, 2004. From 1988 to 2004, he was with the IBM T.J. Watson Research Center.
At IBM, he held various positions from Research Staff Member to Senior Manager. While he was Senior Manager, he had the responsibility of shaping and executing IBM's strategy on nanoscale science and technology as well as exploratory silicon devices and semiconductor technology. During his time at IBM, he managed pathfinding research on high-k/metal gate, strained silicon, alternative channel materials such as Ge and III-V, multi-gate FinFET, ultra-thin SOI - many of these have now become product technology at various companies.
Professor Wong's research aims at translating discoveries in science into practical technologies. His works have contributed to advancements in nanoscale science and technology, semiconductor technology,
He is a Fellow of the IEEE. He served as the Editor-in-Chief of the IEEE Transactions on Nanotechnology (2005 - 2006), sub-committee Chair of the ISSCC (2003 - 2004), General Chair of the IEDM (2007), and is currently the Chair of the IEEE Executive Committee of the Symposia of VLSI Technology and Circuits. He is the faculty director of the Stanford Non-Volatile Memory Technology Research Initiative (NMTRI), and is the founding Faculty Co-Director of the Stanford SystemX Alliance - an industrial affiliate program focused on building systems.
- 2018, 1st ed. 2019, 271 Seiten, Englisch
- Herausgegeben: Rasit O. Topaloglu, H. -S. Philip Wong
- Verlag: Springer-Verlag GmbH
- ISBN-10: 3319903853
- ISBN-13: 9783319903859
- Erscheinungsdatum: 20.08.2018
Abhängig von Bildschirmgröße und eingestellter Schriftgröße kann die Seitenzahl auf Ihrem Lesegerät variieren.
- Dateiformat: PDF
- Größe: 12 MB
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