Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs (PDF)
(Sprache: Englisch)
This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the...
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This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.
- Describes efficient procedures for heirarchical top-down design of pipeline converters;
- Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances, and saturation currents;
- Provides mathematical details of behavioral models, includes descriptions of the synthesis methods and associated tools and illustrates models through case studies supported by silicon prototypes.
Bibliographische Angaben
- Autoren: Jesús Ruiz-Amaya , Manuel Delgado-Restituto , Ángel Rodríguez-Vázquez
- 2011, 209 Seiten, Englisch
- Verlag: Springer-Verlag GmbH
- ISBN-10: 1441988467
- ISBN-13: 9781441988461
- Erscheinungsdatum: 15.07.2011
Abhängig von Bildschirmgröße und eingestellter Schriftgröße kann die Seitenzahl auf Ihrem Lesegerät variieren.
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- Dateiformat: PDF
- Größe: 8.14 MB
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Sprache:
Englisch
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