Formal Verification of Floating-Point Hardware Design (PDF)
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As a basis for the formal verification of such implementations, high-level specifications of the basic arithmetic instructions of several major industry-standard floating-point architectures are presented, including all details pertaining to the handling of exceptional conditions. The methodology is illustrated in the comprehensive verification of a variety of state-of-the-art commercial floating-point designs developed by Arm Holdings.
This revised edition reflects the evolving microarchitectures and increasing sophistication of Arm processors, and the variation in the design goals of execution speed, hardware area requirements, and power consumption. Many new results have been added to Parts I-III (Register-Transfer Logic, Floating-Point Arithmetic, and Implementation of Elementary Operations), extending the theory and describing new techniques. These were derived as required in the verification of the new RTL designs described in Part V.
- Autor: David M. Russinoff
- 2022, 2nd ed. 2022, 436 Seiten, Englisch
- Verlag: Springer Nature Switzerland
- ISBN-10: 3030871819
- ISBN-13: 9783030871819
- Erscheinungsdatum: 03.03.2022
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