Tunnel Field-effect Transistors (TFET) (PDF)
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Tunnel Field-effect Transistors (TFET)
Jagadesh Kumar Mamidala, Rajat Vishnoi, Pratyush Pandey
86.99 €
Divided into eight chapters, the topics covered include: Quantum Mechanics, Basics of Tunneling, The Tunnel FET, Drain current modelling of Tunnel FET: The task and its challenges, Modeling the Surface Potential in TFETs, Modelling the Drain Current, and Device simulation using Technology Computer Aided Design (TCAD). The information is well organized, describing different phenomena in the TFETs using simple and logical explanations.
Key features:
* Enables readers to understand the basic concepts of TFET functioning and modelling in order to read, understand, and critically analyse current research on the topic with ease.
* Includes state-of-the-art work on TFETs, attempting to cover all the recent research articles published on the subject.
* Discusses the basic physics behind tunneling, as well as the device physics of the TFETs.
* Provides detailed discussion on device simulations along with device physics so as to enable researchers to carry forward their study on TFETs.
Primarily targeted at new and practicing researchers and post graduate students, the book would particularly be useful for researchers who are working in the area of compact and analytical modelling of semiconductor devices.
Rajat Vishnoi received his B.Tech degree in EE from the Indian Institute of Technology (IIT), Kanpur, in 2012. He is currently pursuing his Ph.D. degree in Electrical Engineering at the Indian Institute of Technology, Delhi. His research interests include semiconductor device modelling, design and fabrication.
Pratyush Pandey completed his undergraduate in Electrical Engineering from the Indian Institute of Technology (IIT), Kanpur, in 2011. In 2007 he received a Silver Medal in the International Physics Olympiad, and a Gold Medal in the Indian National Chemistry Olympiad. During his undergraduate studies, he worked on quantum error correction codes, quantum cryptography, and applied information theory. Subsequently, he worked as a Research Assistant at IIT Delhi on the analytical modelling of TFETs. He has developed analytical models for Double Gate, Dual Material Gate, and Nanowire TFETs. He is currently a graduate student advised by Dr. Alan Seabaugh at Notre Dame, where he is involved in the simulation, modelling, characterisation, and fabrication of TMD TFETs. He is also a reviewer for IEEE Transactions on Electron Devices, and the Journal of Computational Electronics.
- Autoren: Jagadesh Kumar Mamidala , Rajat Vishnoi , Pratyush Pandey
- 2016, 1. Auflage, 208 Seiten, Englisch
- Verlag: John Wiley & Sons
- ISBN-10: 1119246288
- ISBN-13: 9781119246282
- Erscheinungsdatum: 27.09.2016
Abhängig von Bildschirmgröße und eingestellter Schriftgröße kann die Seitenzahl auf Ihrem Lesegerät variieren.
- Dateiformat: PDF
- Größe: 7 MB
- Mit Kopierschutz
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